Figure 1: Silicon microchip design and layout engineering in an Indian startup. [AI Generated]
Applying for the Design Linked Incentive (DLI) Scheme under the India Semiconductor Mission (ISM) allows domestic startups, Micro, Small and Medium Enterprises (MSMEs), and design companies to unlock financial incentives of up to Rs. 15 Crore for product design and Rs. 30 Crore for product deployment. The application process is managed entirely online by the Centre for Development of Advanced Computing (C-DAC) and requires a detailed technical and financial proposal. The final approval process realistically takes between 90 to 180 days from the date of submission, and there are Rs. 0 application fees.
Before you start
Before initiating your application, you must ensure that your business entity and technical proposal meet the strict criteria set by the Ministry of Electronics and Information Technology (MeitY).
First, verify your domestic company status: more than 50% of your company's capital must be beneficially owned by resident Indian citizens. Next, you must secure your DPIIT Startup Recognition and Udyam Registration, as the scheme is restricted to recognized startups and MSMEs.
Ensure you have a qualified Company Secretary (CS) certify your latest Shareholding Pattern, and obtain a formal Board Resolution or Letter of Authorization for the signatory. Your audited financial statements for the last 5 years (or since incorporation) must be ready, alongside a certificate verifying your clean status on the Defaulter's List. Finally, compile your design architecture, Integrated Circuit (IC) block diagrams, IP core specifications, and current/target Technology Readiness Level (TRL) metrics.
DLI Scheme Financial Support Structure
| Support Component | Maximum Funding Reimbursement | Incentive Details | Source |
|---|---|---|---|
| Design Infrastructure | Rs. 30 Lakh per application | MPW Fabrication, C-DAC EDA Tool Grid, IP Core access | DLI Guidelines |
| Product DLI (P-DLI) | Rs. 15 Crore per application | Milestone-linked reimbursement of up to 50% eligible costs | DLI Guidelines |
| Deployment DLI | Rs. 30 Crore per application | 6% to 4% incentive on net sales turnover over 5 years | DLI Guidelines |
India Semiconductor Mission & DLI Ecosystem Progress (As of 2026)
To understand the scale of the program, MeitY and C-DAC track key metrics demonstrating the development of the domestic "fabless" ecosystem:
| Metric | Current Status / Milestones | Reference Source |
|---|---|---|
| Total Program Outlay (ISM) | ₹76,000 Crore | Cabinet Approved Semicon India |
| DLI Supported Projects | 24 chip design startups approved (e.g., Vervesemi, Mindgrove) | MeitY Year End Review / C-DAC Portal |
| Ecosystem Venture Funding | Nearly ₹430 Crore raised by DLI startups | C-DAC Portal |
| ChipIN Centre EDA Tool Grid | 72+ startups/MSMEs & 300+ academic institutions with access | C-DAC Portal |
| Cumulative EDA Tool Usage | 2.25+ Crore (22.5 million) tool-hours recorded | C-DAC Portal |
| Academic Design tape-outs | 122 designs submitted, 56 chips fabricated at 180nm SCL Mohali | MeitY Year End Review |
| Startup Design tape-outs | 16 tape-outs, 6 chips fabricated at nodes down to 12nm | MeitY Year End Review |
| Startup Patent filings | 10 patents filed under DLI startups | MeitY Year End Review |
Threshold Annual Net Sales Requirements
| Entity Category | Year 1 & 2 Incentive (6%) | Year 3 & 4 Incentive (5%) | Year 5 Incentive (4%) | Source |
|---|---|---|---|---|
| Startups & MSMEs | Rs. 1 Crore minimum net sales | Rs. 1 Crore minimum net sales | Rs. 1 Crore minimum net sales | DLI Guidelines |
| Other Domestic Companies | Rs. 5 Crore minimum net sales | Rs. 5 Crore minimum net sales | Rs. 5 Crore minimum net sales | DLI Guidelines |
Figure 2: How to Apply for the Semiconductor Design Linked Incentive (DLI) Scheme funding, eligibility, and process milestone roadmap. [AI Generated]
DLI Startup Focus Sectors & Target Nodes
Approved startups are targeting diverse, strategic application domains using both domestic and advanced global nodes:
| Focus Application Domain | Representative Target Chip Type | Target Node / Fab Technology |
|---|---|---|
| Satellite Communication | Software-Defined Radio (SDR) Transceivers | Advanced TSMC / UMC nodes |
| IoT & Smart Metering | Secure IoT Microcontrollers / SoCs | 28nm to 180nm nodes (including SCL Mohali) |
| Video Surveillance | Edge AI Video Processor SoCs | 12nm to 28nm nodes |
| Drone Detection & Aviation | High-frequency RF transceivers | Advanced global nodes |
| Electric Vehicles (EVs) | Motor-Control ASICs / Power Controllers | 55nm to 180nm nodes |
Steps
- Access the C-DAC Portal: Open your web browser and navigate to the official C-DAC DLI Scheme portal at https://chips-dli.gov.in/. The home page displays current threshold limits and application updates.
- Register Your Company Profile: Click on the "Register" button on the top navigation bar. Enter your company's incorporation details, corporate identification number (CIN), contact email address, and set up your login credentials. A verification link will be sent to your registered company email.
- Download Official Templates: Log in to your account, navigate to the "Downloads" tab, and download the official Microsoft Word "Proposal Formats of DPR Template" and the official Microsoft PowerPoint "Presentation Template". You must use these specific structures to submit your proposal.
- Draft Your Detailed Project Report (DPR): Complete the downloaded DPR template. You must detail the technical specifications of your semiconductor design (SoC/IC architecture, current TRL level, novelty/USP), the targeted EDA tools needed from C-DAC's grid, your commercialization roadmap (TAM, target deployment volume), and projected financial requirements.
- Upload Documents and Submit Proposal: Go to the portal dashboard and click on "New Application". Complete the online form fields matching your company profile, upload your completed DPR (PDF format), shareholding pattern (certified by CS), audited financials, and authorization letters, then click "Submit Proposal". The system will generate a unique application ID for tracking.
- Provide Clarifications and Present to PMAC: Check the portal dashboard weekly for technical or financial clarification queries raised by C-DAC, and submit answers within the requested timeframe. Once your desk evaluation is completed, C-DAC will summon your team to present the project slides to the Project Management and Advisory Committee (PMAC) for final vetting.
If something goes wrong
Resident Ownership Dilution: If subsequent venture capital funding rounds dilute resident Indian citizens' ownership below the mandatory 50% threshold, your application will be disqualified. Consult with corporate legal advisors to structure funding rounds through domestic instruments. Unclear Block Diagrams / Missing TRL Details: C-DAC will return your DPR with queries. Avoid generic descriptions; revise the technical diagrams and specify clear testing metrics for third-party validation to resubmit via the portal. Defaulter's List Match:* If one of your directors is matched with blacklisted entities, you must replace the director or resolve the dispute with regulatory authorities before applying.
After you finish
Once submitted, you can track the status of your application (under review, queries raised, or approved) in real-time through the online workflow portal. Technical vetting by C-DAC takes between 30 to 45 days, and final approval by MeitY and PMAC takes 90 to 180 days.
Approved applicants receive login access to C-DAC's Electronic Design Automation (EDA) Tool Grid and milestone-based disbursements. For queries, contact C-DAC at support.chips-dli [at] cdac.in or pmudli [at] cdac.in.
Next step
Learn how to secure your foundational business recognitions before applying for semiconductor design support: [DPIIT Startup Recognition](/schemes/dpiit-recognition) Udyam MSME Registration